Light Blocking Layer for Image Sensor Device

ABSTRACT

The present disclosure is directed to a method for forming a light blocking material layer on a back side illuminated image sensor device. The light blocking material layer can block or absorb light rays incoming to the back side illuminated image sensor device at grazing incident angles. The light blocking material layer can be formed using a self-aligned process that does not require the use of a photolithography mask or photolithography operations. For example, the light blocking material layer can be formed over an image sensor device and subsequently etched so that the light blocking material layer remains in areas where light rays incoming at grazing incident angles enter the back side illuminated image sensor device.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional of U.S. Non-Provisional patent application Ser. No. 15/966,885, filed on Apr. 30, 2018 and titled “Light Blocking Layer for Image Sensor Device,” which claims the benefit of U.S. Provisional Patent Application No. 62/586,294, filed on Nov. 15, 2017 and titled “Light Blocking Layer for Image Sensor Device.” The entire contents of both applications are incorporated by reference herein in their entireties.

BACKGROUND

Semiconductor image sensors are used to sense visible or non-visible radiation; such as, for example, visible light, infrared light, etc. Complementary metal-oxide-semiconductor (CMOS) image sensors (CIS) and charge-coupled device (CCD) sensors are used in various applications such as digital still cameras, mobile phones, tablets, goggles, etc. Arrays of pixels featured in CMOS and CIS devices can sense incoming radiation that is projected toward the sensor and convert it into electrical signals.

BRIEF DESCRIPTION OF THE DRAWINGS

Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the common practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features can be arbitrarily increased or reduced for clarity of illustration and discussion.

FIG. 1 is a flow chart of a method for forming an image sensor device, according to some embodiments of the present disclosure.

FIG. 2 is cross-sectional view of a back side illuminated image sensor device, according to some embodiments of the present disclosure.

FIG. 3 is a top view of a composite grid structure configured to receive color filters, according to some embodiments of the present disclosure.

FIG. 4 is a cross-sectional view of magnified top portion of a back side illuminated image sensor device, according to some embodiments of the present disclosure.

FIG. 5 is cross-sectional view of a back side illuminated image sensor device after the deposition of a light blocking material layer, according to some embodiments of the present disclosure.

FIG. 6 is a cross-sectional view of magnified top portion of a back side illuminated image sensor device after the deposition of a light blocking material layer, according to some embodiments of the present disclosure.

FIG. 7 is a cross-sectional view of magnified top portion of a back side illuminated image sensor device after etching a light blocking material layer, according to some embodiments of the present disclosure.

FIG. 8 is a cross-sectional view of a back side illuminated image sensor device after etching a light blocking material layer, according to some embodiments of the present disclosure.

DETAILED DESCRIPTION

The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are disposed between the first and second features, such that the first and second features are not in direct contact.

Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

The term “about” as used herein indicates the value of a given quantity that can vary based on a particular technology node associated with the subject semiconductor device. Based on the particular technology node, the term “about” can indicate a value of a given quantity that varies within, for example, 10-30% of the value (e.g., ±10%, ±20%, or ±30% of the value).

As used herein, the term “substantially” indicates that the value of a given quantity varies by ±1% to ±5% of the value.

In a back side illuminated image sensor device, color filters and micro-lenses are positioned on the back side of a substrate (e.g., on an opposite side of the substrate's circuitry), so that the image sensor device can collect light with minimal or no obstructions. As a result, back side illuminated image sensor devices are configured to detect light from the back side of the substrate, rather than from a front side of the substrate where the color filters and micro-lenses of the image sensor device are positioned between the substrate's circuitry and the pixels. Compared to front side illuminated image sensor devices, back side illuminated image sensor devices have improved performance under low light conditions and higher quantum efficiency (QE) (e.g., photon to electron conversion percentage).

Image sensor devices use color filters to capture color information from incident light rays. For example, the image sensor devices through the use of color filters can detect the red, green, and blue (RGB) regions of the visible light spectrum. A composite grid structure, which can be filled with color filter material, can be used to position the color filter material above pixels of the image sensor device. The composite grid structure can include, for example, an oxide or any other dielectric material that is transparent to visible light.

During normal operation, incoming natural light enters the color filter of the image sensor device from different directions. For example, incoming light rays can have incident angles that range from normal (e.g., 90°) to about 0° (grazing angles) with respect to a horizontal top surface of the color filter. “Stray” light rays, which impinge the color filter at grazing incident angles between about 0° and about 45°, artificially amplify the amount of light collected by the color filter and result in an artificial increase of the pixel's QE. This artificial increase of the pixel's QE from stray light rays is referred to as “crosstalk” and is an undesired phenomenon. The composite grid structure, which contains the color filter, is transparent to visible light and cannot be used to block stray light rays.

Various embodiments in accordance with the present disclosure provide a method to form a light blocking material layer (or structure) that can prevent light rays from entering the color filter at grazing incident angles. Light rays that enter the color filter at grazing incident angles can also be referred to as “stray” light rays. In some embodiments of the present disclosure, the light blocking material layer can reflect the incoming light. Alternatively, the light blocking material layer can absorb the incoming light. In some embodiments of the present disclosure, the light blocking material layer is formed using a self-aligned process so that the light blocking material layer is selectively formed in areas where light rays with grazing incident angles may enter the color filter. Such areas can be, for example, areas of the composite grid structure between the micro-lenses. In some embodiments of the present disclosure, the light blocking material layer is a metal—such as tungsten, aluminum, or copper—or a metal alloy. In other embodiments of the present disclosure, the light blocking material layer can be a dielectric such as silicon oxide, silicon oxy-nitride, or silicon carbide. Alternatively, the light blocking material layer can include an infrared (IR) color filter material that can absorb the visible light and allow IR to pass through. According to some embodiments of the present disclosure, the light blocking material layer enhances the light-guiding capability of the composite grid structure.

According to some embodiments of the present disclosure, FIG. 1 describes a method 100 for forming a light block layer that can block stray light rays from entering the color filters of an image sensor device. The formation of the light blocking layer can therefore prevent or minimize “crosstalk” in the image sensor device (e.g., a back side illuminated image sensor device). For example purposes, method 100 will be described in the context of a back side illuminated image sensor device, Method 100 however, may not limited to back side illuminated image sensor devices and can be applied to other types of image sensor devices, (e.g., front side illuminated image sensor devices) that share similar material layers and/or geometries. These other types of image sensor devices are within the spirit and scope of the present disclosure.

Referring to FIG. 1, method 100 begins with operation 102, where a light blocking material layer is deposited over a transparent material layer which forms micro-lenses on a composite grid structure of an image sensor device. FIG. 2 is a simplified cross-sectional view of a back side illuminated image sensor device 200, according to some embodiments of the present disclosure. Back side illuminated image sensor device 200 includes a semiconductor layer 202 with radiation-sensing areas 204. By way of example and not limitation, semiconductor layer 202 includes a silicon material doped with a p-type dopant, such as boron. Alternatively, semiconductor layer 202 can include silicon that is doped with an n-type dopant, such as phosphorous or arsenic. Semiconductor layer 202 can also include other elementary semiconductors, such as germanium or diamond. Semiconductor layer 202 can optionally include a compound semiconductor and/or an alloy semiconductor. Further, semiconductor layer 202 can include an epitaxial layer, which may be strained for performance enhancement. Semiconductor layer 202 can include a silicon-on-insulator (SOI) structure.

The semiconductor layer 202 has a front side (also referred to as a bottom surface) 206 and a back side (also referred to as a top surface) 208. The semiconductor layer 202 has a thickness that can range from about 100 μm to about 3000 μm.

Radiation-sensing regions or pixels 204 are formed in the semiconductor layer 202. As disclosed herein, the terms “radiation-sensing regions” and “pixels” may be used interchangeably. Pixels 204 are configured to sense radiation, such as incident light rays impinging semiconductor layer 202 from back side 208. Each of the radiation-sensing regions or pixels 204 can include a photodiode that can convert photons to electric charge, according to some embodiments of the present disclosure. In some embodiments of the present disclosure, pixels 204 can include photodiodes, transistors, amplifiers, other similar devices, or combinations thereof. Pixels 204 may also be referred to herein as “radiation-detection devices” or “light-sensors.”

For simplicity, two pixels 204 are illustrated in FIG. 2, but additional pixels 204 can be implemented in semiconductor layer 202. By way of example and not limitation, pixels 204 can be formed using an ion implant process on semiconductor layer 202 from front side 206. Pixels 204 can also be formed by a dopant diffusion process.

Pixels 204 are electrically isolated from each other with shallow trench isolation (STI) structures 210 and deep trench isolation (DTI) structures 211 STI structures 210 and DTI structure 211 are trenches etched into semiconductor layer 202 and filled with a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, fluorine-doped silicate glass (FSG), a low-k dielectric material (e.g., a material with a k value lower than 3.9), and/or a suitable insulating material. According to some embodiments of the present disclosure, DTI structures 211 on back side 208 of semiconductor layer 202 have an anti-reflective coating (ARC) 212. ARC 212 is a liner layer that can prevent incoming light rays from being reflected away from radiation-sensing areas/pixels 204. ARC 212 can include a high-k material (e.g., a material with a k-value higher than 3.9), such as hafnium oxide (HfO₂), tantalum pentoxide (Ta₂O₅), zirconium dioxide (ZrO₂), aluminum oxide (Al₂O₃), or any other high-k material. ARC 212 can be deposited using sputtering, a chemical vapor deposition (CVD)-based process, an atomic layer deposition (ALD)-based process, or any other suitable deposition process or method. In some embodiments of the present disclosure, the thickness of ARC 212 can range from about 10 Å to about 500 Å.

Back side illuminated image sensor device 200 also includes a capping layer 214 formed over the semiconductor layer 202, such as over the ARC 212, as illustrated in FIG. 2. In some embodiments of the present disclosure, capping layer 214 can provide a planar surface on which additional layers of back side illuminated image sensor device 200 can be formed. Capping layer 214 can include a dielectric material, such as silicon oxide (SiO₂), silicon nitride (Si₃N₄), silicon oxy-nitride (SiON), or any other suitable dielectric material. Further, capping layer 214 can be deposited using CVD or any other suitable deposition technique. In some embodiments of the present disclosure, the thickness of capping layer 214 can range between about 500 Å and about 2000 Å.

Further, back side illuminated image sensor device 200 includes a composite grid structure 216 formed over capping layer 214. According to sonic embodiments of the present disclosure, composite grid structure 216 includes cells 218 arranged in columns and rows, where each cell 218 is aligned to a respective radiation-sensing area 204. As mentioned above, cells 218 can receive a red, green, or blue color filter 220.

FIG. 3 is a top view of composite grid structure 216, according to some embodiments of the present disclosure. Each cell 218 of composite grid structure 216 includes (e.g., is filled with) color filter 220. By way of example, a red, a green, or a blue color filter can occupy more than one cell 218. For example, in FIG. 3, four cells (e.g., adjacent cells) 218 include (e.g., are filled with) the same color filter 220. For example in FIG. 3, four cells 218 are filled with a black shading, four cells 218 are filled with a gray shading, and four cells 218 are filled with a hashed shading, etc.; where each shading can correspond to a different color filter 220. The number of cells 218 that include the same color filter 220, as depicted in FIG. 3, is exemplary and not limiting. Therefore, the group of cells 218 that include the same color filter 220 can be larger or smaller (e.g., two, six, etc.).

Referring to FIG. 2, cells 218 of composite grid structure 216 can be formed by depositing a bottom layer 222 and a top dielectric layer 224 and selectively etching away portions of the metal layer and dielectric layer to form cells 218. By way of example and not limitation, composite grid structure 216 can be formed as follows: bottom layer 222 and top dielectric layer 224 can be blanket deposited on capping layer 214. One or more photolithography and etch operations can be used to pattern bottom layer 222 and top dielectric layer 224 to form the sidewalls of cells 218. The photolithography and etch operations can be performed so that each cell 218 of composite grid structure 216 is aligned to respective pixels 204 of semiconductor layer 202. In some embodiments, the sidewall height of each cell 188 of composite grid structure 216 can range from about 200 nm to about 1000 nm.

Bottom layer 222 of cell 218 can include titanium, tungsten, aluminum, or copper. However, bottom layer 222 of cells 218 may not be limited to metals, and can include other suitable materials or stack of materials that can reflect and guide incoming visible light towards radiation-sensing areas 204. In some embodiments of the present disclosure, bottom layer 222 of cells 218 is formed using a sputtering process, a plating process, an evaporation process, or any other suitable deposition method. According to some embodiments of the present disclosure, the thickness of bottom layer 222 of each cell 218 can range from about 100 Å to about 3000 Å.

Top dielectric layer 224 can include one or more dielectric layers. In some embodiments of the present disclosure, top dielectric layer 224 can protect previously formed layers of back side illuminated image sensor device 200 (e.g., bottom layer 222 and capping layer 214). Top dielectric layer 224 can allow incoming light to pass through and reach radiation-sensitive areas (or pixels) 204, Top dielectric layer 224 can include a transparent material or materials. In some embodiments of the present disclosure, top dielectric layer 224 can include SiO₂, Si₃N₄, SiON, or any other suitable transparent dielectric material. Top dielectric layer 224 can be deposited by CND or ALI) and can have a deposited thickness range from about 1000 Å to about 3000 Å, according to some embodiments of the present disclosure.

Cells 218 can also include a passivation layer 226, which is interposed between color filter 220 and the sidewalls of cells 218 (e.g., bottom layer 222 and top dielectric layer 224). In some embodiments of the present disclosure, passivation layer 226 can be conformally deposited by a CVD-based or an ALD-based deposition technique at a thickness range between about 50 Å and about 3000 Å. Passivation layer 226 can be formed from a dielectric material, such as SiO₂, Si₃N₄, or SION.

According to some embodiments of the present disclosure, the top surface of color filters 220 can be aligned to the top surface of passivation layer 226 on top dielectric layer 224. Alternatively, color filters 220 can be formed above the top surface of passivation layer 226 on top dielectric layer 224. For example and explanation purposes, the top surface of color filters 220 will be described as being aligned to the top surface of passivation layer 226 on top dielectric layer 224.

Referring to FIG. 2, after cells 218 of composite grid structure 216 receive their respective color filters 220, a transparent material layer 228 can be formed over composite grid structure 216 and color filters 220. Transparent material layer 228 can be in contact with passivation layer 226 if the top surface of color filters 220 is aligned to the top surface of passivation layer 226 over top dielectric layer 224. Alternatively, transparent material layer 228 may not be in contact with passivation layer 226 if the top surface of color filters 220 is above the top surface of passivation layer 226 over top dielectric layer 224. .in some examples, transparent material layer 228 forms a micro-lens 230 over each cell 218 of composite grid structure 216. Micro-lenses 230 are aligned with respective radiation-sensing areas 204 and are formed so they cover the top surface of color filters 220 within the boundaries of cell 218 (e.g., within the sidewalis of each cell 218).

Micro-lenses 230, due to their curvature, are thicker than other areas of transparent material layer 228 (e.g., areas between micro-lenses 230 above top dielectric layer 224). For example, transparent material layer 228 is thicker over color filter 220 (e.g., where micro-lens 230 is formed) and thinner in areas between micro-lenses 230 (e.g., above top dielectric layer 224). Referring to FIG. 4, which is a magnified view of a top portion of back side illuminated image sensor device 200 of FIG. 2, transparent material layer 228 is thicker over color filter 220 (e.g., where micro-lens 230 is formed) and thinner in areas between micro-lenses 230 (e.g., over top dielectric layer 224). Transparent material layer 228 has a thickness T1 at micro-lenses 230 region over color filter 220, and a thickness T2 between adjacent micro-lenses 230 over top dielectric layer 224.

Referring to FIG. 2, back side illuminated image sensor device 200 can also include an interconnect structure 232. Interconnect structure 232 can include a plurality of patterned dielectric layers and conductive layers that form interconnects (e.g., wiring) between pixels 204 and other components not shown in FIG. 1 of back side illuminated image sensor device 200. The interconnect structure 232 may, for example be, one or more multilayer interconnect (MLI) structures 234 embedded in an interlayer dielectric (ILD) layer 236. According to some embodiments of the present disclosure, MLI structures 234 can include contacts/vias and metal lines. For purposes of illustration, a plurality of conductive lines 238 and vias/contacts 240 are shown in FIG. 2. The position and configuration of conductive lines 238 and vias/contacts 240 can vary depending on design needs and is not limited to the depiction of FIG. 2.. Further, interconnect structure 232 can include sensing devices 242. Sensing devices 242 can be, for example, an array of field effect transistors (FETs) and/or memory cells that are electrically connected to respective radiation-sensing areas (or pixels) 204 and configured to read the electrical signal produced in those areas as a result of a light-to-charge conversion process.

In some embodiments of the present disclosure, interconnect structure 232 can be a top layer of a partially-fabricated integrated circuit (IC) or of a fully-fabricated IC that can include multiple layers of interconnects, resistors, transistors, or other semiconductor devices. Furthermore, interconnect structure 232 can be attached via a buffer layer (not shown in FIG. 2) to a carrier substrate (not shown in FIG. 1) that can provide support to the structures fabricated thereon (e.g., interconnect structure 232, semiconductor layer 202, etc.). The carrier substrate can be, for example, a silicon wafer, a glass substrate, or any other suitable material.

In some embodiments of the present disclosure, a method to fabricate back side illuminated image sensor device 200 can include forming semiconductor layer 202 on a silicon substrate (e.g., silicon wafer) and subsequently forming interconnect structure 232 over front side 206 of semiconductor layer 202. Interconnect structure 232 can undergo multiple photolithography, etch, deposition, and planarization operations before it is completed. Once interconnect structure 232 is formed, a carrier substrate, as discussed above, can be attached to the top of interconnect structure 232. For example, a buffer layer can act as an adhesion medium between the carrier substrate and interconnect structure 232. The silicon substrate can be turned upside down, and the silicon substrate can be mechanically grinded and polished until back side 208 of semiconductor layer 202 is exposed. DTI structures 211 on back side 208 of semiconductor layer 202 can be subsequently formed to further electrically isolate radiation-sensing areas or pixels 204, according to some embodiments. Capping layer 214, along with the composite grid structure 216, can be formed on back side 208 of semiconductor layer 202.

Composite grid structure 216 can be formed so that each of its cells 218 is aligned to respective radiation-sensing areas or pixels 204. Alignment of composite grid structure 216 and radiation-sensing areas, or pixels 204 can be achieved with photolithographic operations based on, for example, alignment marks present on back side 208 of semiconductor layer 202. The formation of composite grid structure 216 can include the deposition and subsequent patterning of bottom layer 222 and top dielectric layer 224 using photolithography and etch operations to form cells 218. Passivation layer 226 is subsequently deposited over the exposed surfaces of bottom layer 222 and top dielectric layer 224. Color filters 220 can fill cells 218, and transparent material layer 228 can be deposited thereon to form micro-lenses 230. Fabrication of back side illuminated image sensor device 200 is not limited to the operations described above and additional or alternative operations can be performed.

In referring to FIG. 2, transparent material layer 228 of back side illuminated image sensor device 200 can be the transparent material layer described in operation 102; and the composite grid structure 216 of back side illuminated image sensor device 200 can be the composite grid structure of operation 102. As discussed above, transparent material layer 228 can form micro-lenses 230 that are aligned to respective color filters 220 of back side illuminated image sensor device 200, In some embodiments of the present disclosure, micro-lenses 230 are designed to focus and guide incoming light rays through color filters 220 to respective pixel, or radiation-sensitive areas, 204.

FIG. 5 shows back side illuminated image sensor device 200 after the deposition of a. light blocking material layer 500 according to operation 102. According to some embodiments of the present disclosure, light blocking material layer 500 is blanket deposited on transparent material layer 228, In some embodiments of the present disclosure, light blocking material layer 500 covers the entire surface of transparent material layer 228 including areas where micro-lenses 230 are formed and areas therebetween (e.g., over top dielectric layer 224 of composite grid structure 216 between cells 218). Additionally, light blocking material layer 500 can include an infrared oR) color filter material that can absorb visible light. According to some embodiments of the present disclosure, light blocking material layer 500 can include a dielectric, such as silicon nitride, silicon oxy-nitride, silicon carbide, or any other suitable material. Alternatively, light blocking material layer 500 can include a reflective material, such as tungsten, copper, aluminum, a metal alloy, or any other suitable material.

Deposition of light blocking material layer 500 can be performed by a physical vapor deposition (PVD), CVD, ALD, plasma-assisted CVD, plasma-assisted ALD, evaporation, focused ion beam induced deposition, electron-beam assisted deposition, a spin-coating process, or any other suitable deposition technique. In some embodiments of the present disclosure, after the deposition of light blocking material layer 500, an optional chemical mechanical planarization (CMP) process can be used to planarize and smoothen the top surface of light blocking material layer 500.

Referring to FIG. 6, which is a magnified top portion of FIG. 5, the as-deposited (or planarized) light blocking material layer 500 has a thickness T3 that is larger than the thickness T4 of micro-lens 230 above the level of transparent material layer 228. If T3 is less than T4 (e.g., T3<T4), the CMP process cannot adequately planarize the surface of light blocking material layer 500 without damaging micro-lens 230, and/or a subsequent etch step will not be able to recess light blocking material layer 500 in a desired manner. In some embodiments, the ratio of T3 to T4 is equal to or greater than one (e.g., T3/T4>1)

In referring to FIG. 1 and operation 104, an etch operation is used to recess/remove light blocking material layer 500 from a portion of the top surface of micro-lenses 230. The etch operation can be terminated when the etched/recessed blocking material layer 500 is limited to portions of transparent material layer 228 between micro-lenses 230. FIG. 7 shows the recessed blocking material layer 500 on transparent material layer 228 after the etch process of operation 104. According to some embodiments of the present disclosure, the resulting recessed thickness T5 of light blocking material layer 500 can range from about 5% to about 50% of thickness T1 of micro-lens 230. In other words, the thickness ratio between T5 and T1 can range from about 0.05 to about 0.5 (e.g., 0.05<T5/T1<0.5). If the T5/T1 ratio is less than 0.05, blocking material layer 500 will not effectively block light rays entering micro-lenses 230 at grazing angles (e.g., between 0° and about 45°). On the other hand, if the T5/T1 ratio is greater than 0.5, blocking material layer 500 will block light rays entering micro-lenses 230 at angles larger than about 45°, which will result in fewer light rays entering the sensor device. According to some embodiments of the present disclosure, the thickness ratio T5/T1 is determined based on the thickness T1 of micro-lens 230 and the type of material for light blocking material layer 500. For example, light blocking material layer 500 can be made from a dielectric (e.g., silicon nitride, silicon oxy-nitride, silicon carbide, or any other suitable material) and can have a different recessed thickness T5 from light blocking material layer 500 being made from a metal (e.g., tungsten, copper, aluminum, or any other suitable material) or from light blocking material layer 500 being made from a light absorbing material that includes an IR color filter. Alternatively, in some embodiments of the present disclosure, the selection of light blocking material layer 500 can be made based on geometrical characteristics of back side illuminated image sensor device 200, such as the thickness T4 of micro-lens 130 and the desired recessed thickness T5 of light blocking material layer 500.

According to some embodiments of the present disclosure, the etch process is an anisotropic etch. For example, an etch process that is directional with a high etch rate towards a single direction. Further, the etch process has a high selectivity towards light blocking material layer 500. For example, the etch selectivity ratio between light blocking material layer 500 and transparent material layer 228 can be more than 5:1 (e.g., 10:1). The etch process can be a dry etch or a wet etch with appropriate selectivity (e.g., more than 5:1). Additionally, the etch process can be timed for example, the etch process can be terminated after a predetermined amount of time based on the as-deposited thickness T3 (shown in FIG. 6) and the type of light blocking material layer 500.

As described above, method 100 does not include operations that do not require a photolithography mask or photolithography operations to form light blocking material layer 500 between micro-lenses 230. For example, the recessed light blocking material layer 500 can be self-aligned to portions of transparent material layer 228 between micro-lenses 230. Therefore, the recessed thickness T4 can be adjusted depending on (i) the type of material of light blocking material layer 500 and (ii) the thickness T1 of micro-lenses 230.

FIG. 8 is a cross-sectional view of back side illuminated image sensor device 200 after etching light blocking mated al layer 500, according to some embodiments of the present disclosure. For example, light ray 800—which is incoming to back side illuminated image sensor device 200 at a grazing angle θ—is reflected from light blocking material layer 500, according to some embodiments of the present disclosure. In some embodiments of the present disclosure, incoming ray 800 is absorbed by light blocking material layer 500. Contrary to light ray 800, light ray 802—which is incoming at a normal angle to back side illuminated image sensor device 200—is allowed to enter color filter 220. Therefore, light blocking material layer 500 can mitigate crosstalk from light rays incoming at grazing incident angles.

The present disclosure is directed to an exemplary fabrication method that can be used to form a self-aligned light blocking material layer on a back side illuminated image sensor device. The light blocking material layer can block or absorb light rays incoming to the back side illuminated image sensor device at grazing incident angles. In some embodiments of the present disclosure, the light blocking material layer can be formed using a self-aligned process that does not require the use of a photolithography mask or photolithography operations. For example, the light blocking material layer can be formed over an image sensor device and subsequently etched so that the light blocking material layer remains in areas where light rays incoming at grazing incident angles enter the color filter. In other words, the etch process takes advantage of the local topography of the micro-lenses to form a self-aligned light blocking layer on the areas between adjacent micro-lenses. Such areas can be, for example, areas of the composite grid structure between the micro-lenses (between cells 218 of FIG. 2). In some embodiments of the present disclosure, the light blocking material layer can be a metal—such as, tungsten, aluminum, or copper—or a metal alloy. In other embodiments of the present disclosure, the light blocking material layer can be a dielectric, such as silicon oxide, silicon oxy-nitride, or silicon carbide. Alternatively, the light blocking material layer can include an IR color filter material that allows IR to pass through. An 1R color filter material can be, for example, a polymer. As a result, the light blocking material layer can enhance the back side illuminated image sensor device's light-guiding capability.

In some embodiments of the present disclosure, an image sensor includes a semiconductor layer with a top surface and a bottom surface, where the semiconductor layer includes one or more sensing regions configured to sense radiation that enters the semiconductor layer from the top surface. The image sensor further includes a grid structure with one or more cells respectively aligned to the one or more sensing regions; a transparent material layer disposed over the grid structure, where the transparent material layer forms a micro-lens over each of the one or more cells; and a light blocking material layer disposed on the transparent material layer between the micro-lenses.

In some embodiments of the present disclosure, a semiconductor image sensor includes a grid structure with one or more cells disposed over a semiconductor layer configured to sense radiation received by the grid structure, where the semiconductor layer is disposed on a multilayer interconnect structure. The semiconductor image sensor further includes a color filter in each of the one or more cells, micro-lenses formed over the one or more cells of the grid structure, and a light blocking layer disposed between the micro-lenses. Further, the light blocking layer is thinner than the micro-lenses.

In some embodiments of the present disclosure, a method to manufacture a semiconductor image sensor includes forming a semiconductor layer over a multilayer interconnect structure, where the semiconductor layer includes one or more sensing regions configured to sense radiation received by the semiconductor layer. The method further includes forming, on the semiconductor layer, a grid structure with one or more cells respectively aligned to the one or more sensing regions, disposing a transparent layer over the grid structure to form a micro-lens that is aligned with each of the one or more cells, and forming a light blocking layer between adjacent micro-lenses. Further, forming the light blocking layer includes depositing the light blocking layer over the transparent layer and etching the light blocking layer to remove the light blocking layer over the micro-lens.

It is to be appreciated that the Detailed Description section, and not the Abstract of the Disclosure, is intended to be used to interpret the claims. The Abstract of the Disclosure section may set forth one or more but not all exemplary embodiments contemplated and thus, are not intended to be limiting to the subjoined claims.

The foregoing disclosure outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art will appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art will also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the subjoined claims. 

What is claimed is:
 1. A method of manufacturing a semiconductor image sensor, the method comprising: forming a semiconductor layer with a first side and an opposite second side and with a multilayer interconnect structure coupled to the first side of the semiconductor layer; forming, on the second side of the semiconductor layer, a grid structure comprising cells configured to receive respective color filters; disposing a transparent layer over the grid structure to form a micro-lens on each cell; and forming a light blocking layer between adjacent micro-lenses, wherein forming the light blocking layer comprises: depositing the light blocking layer on the transparent layer; and etching the light blocking layer to remove the light blocking layer on the micro-lens so that a thickness ratio between a thickness of the etched light blocking layer and a thickness of the micro-lens ranges between about 0.05 and about 0.5.
 2. The method of claim 1, wherein depositing the light blocking layer comprises depositing the light blocking layer with a physical vapor deposition (PVD) process, a chemical vapor deposition (CVD) process, an atomic layer deposition (ALD) process, a plasma-assisted CVD process, a plasma-assisted ALD process, an evaporation process, a focused ion beam induced deposition process, an electron-beam assisted deposition process, or a spin-coating process.
 3. The method of claim 1, wherein etching the light blocking layer comprises etching the light blocking layer with a dry etch or a wet etch process that has a selectivity ratio between the light blocking layer and the transparent layer greater than about 5:1.
 4. The method of claim 1, wherein depositing the light blocking layer comprises depositing tungsten, aluminum, copper, a metal alloy, silicon nitride, silicon oxy-nitride, or silicon carbon.
 5. The method of claim 1, wherein depositing the light blocking layer comprises depositing an infrared color filter material.
 6. The method of claim 1, wherein depositing the light blocking layer comprises depositing the light blocking layer at a thickness larger than a thickness difference between a thickness of the micro-lens and a thickness of the light blocking layer disposed between adjacent micro-lenses.
 7. The method of claim 1, wherein, depositing the light blocking layer comprises depositing the light blocking layer on each micro-lens and between adjacent micro-lenses.
 8. The method of claim 1, wherein, prior to etching the light blocking layer, thinning the light blocking layer with a chemical mechanical planarization (CMP) process.
 9. A method, comprising: forming a grid structure on a semiconductor layer, wherein the grid structure comprises cells configured to receive color filters; depositing a transparent layer on the grid structure, wherein the transparent layer is thinner between the cells and thicker on the cells; depositing a light blocking material on the transparent layer; planarizing a top surface of the light blocking material; and removing the light blocking material from thicker portions of the transparent layer.
 10. The method of claim 9, wherein depositing the light blocking material comprises depositing the light blocking material thicker than a thickness difference between the transparent layer deposited on the cells and the transparent layer deposited between the cells.
 11. The method of claim 9, wherein planarizing the top surface of the light blocking material comprises a chemical mechanical polishing (CMP) to flatten and polish the top surface of the light blocking material.
 12. The method of claim 9, wherein depositing the transparent a e comprises forming a micro-lens on each cell.
 13. The method of claim 9, wherein removing the light blocking material comprises etching the light blocking material with an etch process having an etch selectivity between the light blocking material and the transparent layer of about 10:1.
 14. The method of claim 9, wherein removing the light blocking material comprises reducing a first thickness of the blocking material to a second thickness, the second thickness being between about 5% and about 50% of that of the transparent layer on the cells.
 15. The method of claim 9, wherein removing the light blocking material comprises reducing a thickness of the light blocking material on thinner portions of the transparent material.
 16. The method of claim 9, wherein the light blocking material comprises a metal, a metal alloy, or a silicon-containing material.
 17. A method, comprising: disposing a semiconductor layer comprising radiation sensing areas between an interconnect layer and a grid structure, wherein the grid structure and the interconnect layer are disposed on opposite sides of the semiconductor layer and the grid structure comprises cells substantially aligned to the radiation sensing areas of the semiconductor layer; disposing color filters in the cells of the grid structure; depositing a light transparent layer on the grid structure, wherein the light transparent layer forms a continuous layer on the grid structure that is thicker over the cells and thinner between the cells; depositing a light blocking material on the transparent layer; and etching the light blocking material so that a thickness of the light blocking material on thinner portions of the transparent layer is between about 5% and about 50% of a thickness of the thicker portions of the light transparent layer.
 18. The method of claim 17, wherein the thicker portions of the light transparent layer form micro-lenses.
 19. The method of claim 17, wherein light blocking material comprises an infrared color filter material.
 20. The method of claim 17, further comprising, prior to etching the light blocking material, planarizing a top surface of the deposited light blocking material with a chemical mechanical polishing (CMP) process. 